Ready for best-in-class real-time hardware video encoding? WebM Project now includes the BigE VP9 hardware encoder IP, specially designed for a number of RTC (real-time communications) use cases, such as:
Mobile Devices: Significant compression gains over H.264, even down to CIF resolution. BigE enables RTC for the next billion mobile users.
Video Conferencing Systems: Up to 2160p resolution encode.
Live Video Streaming Cameras: Bandwidth is always an issue in live videocasting, but not with BigE.
If you don’t know what RTC is all about, please check what our friends at WebRTC are doing and how VP9 can help take RTC experiences to the next level.
Following on the success of the G2 VP9 decoder, BigE is fully designed with a high-level synthesis (HLS) flow. All hardware modules are designed in C++ and converted to RTL using Calypto’s Catapult C high-level synthesis tool. HLS design allows our WebM partners to work with the code more easily, and to contribute great ideas that will improve VP9 further still.
BigE supports the following features:
While the majority of RTC video calling and live video streaming applications optimize for video quality in the HD domain (720p and 1080p), high compression quality across multiple resolutions has been a primary BigE design goal. It’s designed to exceed previous-generation VP8/H.264 compression quality by at least 30%, from CIF to 4k.
BigE should be considered the reference implementation for VP9 encoding in hardware, meeting the app development community’s quality requirements for a majority of devices.
Following are examples of BigE’s performance:
WebM BigE enables 4K (2160p) encode on a number of different consumer devices from mobile devices to high quality VC and live video streaming. BigE is designed up to 2160p@30fps encode with a single core, highly optimized in terms of compression quality vs the silicon area.
Key BigE performance and area parameters:
The standard BigE delivery package includes all required source code to integrate the decoder with the actual SoC.
Zero-latency clock frequency requirement tells you the ideal performance of the encoding pipeline itself, i.e., DRAM access latencies are not taken into account. Third-party VP9 encoder hardware implementors are encouraged to meet the WebM VP9 hardware encoder speed. ↩
Frames per second performance depends on the actual encoder clock frequency of the final SoC. ↩